Your new post is loading...
|
Rescooped by Richard Platt from Innovation |
Dan Enloe's curator insight,
September 8, 2020 1:32 PM
Semiconductor Engineering Editor in Chief Ed Sperling has great points. The ability to single pattern more in a device using EUV litho is a key advantage for accurately rendering a design, reducing shorts or opens that might occur in the less precise multi-exposure methods using immersion lithography. Advantange to TSMC
"The semiconductor industry is making huge progress in understanding the causes and telltale signs of circuit aging and irregular behavior. But are devices actually getting more reliable? The answer depends on a number of factors, none of which is easily measured. To be sure, circuits are much better designed and inspected than in the past, and the individual components are printed more accurately using EUV than with double patterning. Moreover, there are more techniques for ensuring that chips are operating as expected throughout their lifetimes, such as in-circuit monitoring and external monitoring around the chips. But reliability is a measure of quality over time, and it’s getting harder to track that reliability across different implementations..".
Sign up to comment
Semiconductor Engineering Editor in Chief Ed Sperling has great points. The ability to single pattern more in a device using EUV litho is a key advantage for accurately rendering a design, reducing shorts or opens that might occur in the less precise multi-exposure methods using immersion lithography. The advantage to TSMC - "The semiconductor industry is making huge progress in understanding the causes and telltale signs of circuit aging and irregular behavior. But are devices actually getting more reliable? The answer depends on a number of factors, none of which is easily measured. To be sure, circuits are much better designed and inspected than in the past, and the individual components are printed more accurately using EUV than with double patterning. Moreover, there are more techniques for ensuring that chips are operating as expected throughout their lifetimes, such as in-circuit monitoring and external monitoring around the chips. But reliability is a measure of quality over time, and it’s getting harder to track that reliability across different implementations..".